| Draft for Information Only Content 
    Raspberry Pi: Config.txtThe Format of Parameter Setting
 The Parameter Settings
 
    Raspberry Pi: Config.txt
        During the booting 
        process by the BCM2385 multimedia processor, an optional configuration file can 
        also be read from the boot partition by the VideoCore Code for configuring the 
        BCM2385 multimedia processor before the configuration options can be controlled 
        by the ARM code.  
        The Format of Parameter Setting 
        One parameter option per line with the form "property=value" where value is an 
        integer. And comment line begins with "#" 
        The Parameter Settings 
        arm_freq : frequency of ARM in MHz. Default 700.
gpu_freq : Sets core_freq, h264_freq, isp_freq, v3d_freq together.
core_freq : frequency of GPU processor core in MHz. Default 250.h264_freq: frequency of hardware video block in MHz. Default 250.isp_freq: frequency of image sensor pipeline block in MHz. Default 250.v3d_freq: frequency of 3D block in MHz. Default 250.sdram_freq: frequency of SDRAM in MHz. Default 400.over_voltage_* settings: When the of of over_voltage_* settings is used, the OTP 
    (one-time-programmable) bit will be blowed. Besides overclocking itself may only 
    cause system unstable with little impact on the chip lifetime, however 
    overvoltaging may have a significant impact on chip lifetime. 
over_voltage: ARM/GPU core voltage adjust. [-16,8] equates to [0.8V,1.4V]. Default 0 (1.2V)
over_voltage_sdram: Sets over_voltage_sdram_c, over_voltage_sdram_i, over_voltage_sdram_p together
over_voltage_sdram_c: SDRAM controller voltage adjust. [-16,8] equates to [0.8V,1.4V]. Default 0 (1.2V)
over_voltage_sdram_i: SDRAM I/O voltage adjust. [-16,8] equates to [0.8V,1.4V]. Default 0 (1.2V)
over_voltage_sdram_p: SDRAM phy voltage adjust. [-16,8] equates to [0.8V,1.4V]. Default 0 (1.2V)
sdtv_mode: composite tv mode. Default is 0 (NTSC)
SDTV_MODE_NTSC       = 0, /**<Normal NTSC */
SDTV_MODE_NTSC_J     = 1, /**<Japanese version of NTSC - no pedestal.*/
SDTV_MODE_PAL        = 2, /**<Normal PAL */
SDTV_MODE_PAL_M      = 3, /**<Brazilian version of PAL - 525/60 rather than 625/50, different subcarrier */
sdtv_aspect: composite aspect ratio. Default is 1 (4:3)
SDTV_ASPECT_4_3      = 1, /**<4:3 */
SDTV_ASPECT_14_9     = 2, /**<14:9 */
SDTV_ASPECT_16_9     = 3  /**<16:9 */
hdmi_mode: hdmi mode. Default is negotiated with display.
    HDMI_CEA_VGA             =  1,
HDMI_CEA_480p60          =  2,
HDMI_CEA_480p60H         =  3,
HDMI_CEA_720p60          =  4,
HDMI_CEA_1080i60         =  5,
HDMI_CEA_480i60          =  6,
HDMI_CEA_480i60H         =  7,
HDMI_CEA_240p60          =  8,
HDMI_CEA_240p60H         =  9,
HDMI_CEA_480i60_4x       = 10,
HDMI_CEA_480i60_4xH      = 11,
HDMI_CEA_240p60_4x       = 12,
HDMI_CEA_240p60_4xH      = 13,
HDMI_CEA_480p60_2x       = 14,
HDMI_CEA_480p60_2xH      = 15,
HDMI_CEA_1080p60         = 16,
HDMI_CEA_576p50          = 17,
HDMI_CEA_576p50H         = 18,
HDMI_CEA_720p50          = 19,
HDMI_CEA_1080i50         = 20,
HDMI_CEA_576i50          = 21,
HDMI_CEA_576i50H         = 22,
HDMI_CEA_288p50          = 23,
HDMI_CEA_288p50H         = 24,
HDMI_CEA_576i50_4x       = 25,
HDMI_CEA_576i50_4xH      = 26,
HDMI_CEA_288p50_4x       = 27,
HDMI_CEA_288p50_4xH      = 28,
HDMI_CEA_576p50_2x       = 29,
HDMI_CEA_576p50_2xH      = 30,
HDMI_CEA_1080p50         = 31,
HDMI_CEA_1080p24         = 32,
HDMI_CEA_1080p25         = 33,
HDMI_CEA_1080p30         = 34,
HDMI_CEA_480p60_4x       = 35,
HDMI_CEA_480p60_4xH      = 36,
HDMI_CEA_576p50_4x       = 37,
HDMI_CEA_576p50_4xH      = 38,
HDMI_CEA_1080i50_rb      = 39,
HDMI_CEA_1080i100        = 40,
HDMI_CEA_720p100         = 41,
HDMI_CEA_576p100         = 42,
HDMI_CEA_576p100H        = 43,
HDMI_CEA_576i100         = 44,
HDMI_CEA_576i100H        = 45,
HDMI_CEA_1080i120        = 46,
HDMI_CEA_720p120         = 47,
HDMI_CEA_480p120         = 48,
HDMI_CEA_480p120H        = 49,
HDMI_CEA_480i120         = 50,
HDMI_CEA_480i120H        = 51,
HDMI_CEA_576p200         = 52,
HDMI_CEA_576p200H        = 53,
HDMI_CEA_576i200         = 54,
HDMI_CEA_576i200H        = 55,
HDMI_CEA_480p240         = 56,
HDMI_CEA_480p240H        = 57,
HDMI_CEA_480i240         = 58,
HDMI_CEA_480i240H        = 59,
overscan_left: number of pixels to skip on left
overscan_right: number of pixels to skip on right
overscan_top: number of pixels to skip on top
overscan_bottom: number of pixels to skip on bottom
framebuffer_width: console framebuffer width in pixels. Default matches display.
framebuffer_height: console framebuffer height in pixels. Default matches display.
test_mode: enable test sound/image during boot for manufacturing test.
enable_l2cache: enable ARM access to GPU's L2 cache. Needs corresponding L2 enabled kernel. Default 0. 
Note: The L2 cache is a 128k 4 way set associative cache. The L2 cache is dedicated to the GPU only by default and is 
    bypassed by the ARM processor. The L2 cache is part of the GPU design. The clock 
    cycle of L2 cache may closer to the clock cyle of GPU as the GPU and ARM are 
    clocked at different clock cycles. Besides, the L2 cache is also outside the 
    ARM's MMU.  
         ©sideway
 
 ID: 140100006 Last Updated: 1/9/2014 Revision: 0 |  |